2 Filter - Behavioral (/home/epilef/4-FiltroHDL/FiltroHDL/Filter.vhd) 0 0 000000ff00000000000000010000000100000000000000000000000000000000020200000001000000010000006400000110000000020000000000000000000000000200000064ffffffff000000810000000300000002000001100000000100000003000000000000000100000003 true Filter - Behavioral (/home/epilef/4-FiltroHDL/FiltroHDL/Filter.vhd) 1 Design Utilities/Compile HDL Simulation Libraries Design Utilities 0 0 000000ff000000000000000100000001000000000000000000000000000000000000000000000000f1000000010000000100000000000000000000000064ffffffff000000810000000000000001000000f10000000100000000 false Design Utilities 1 Filter.vhd 0 0 000000ff00000000000000010000000000000000010000000000000000000000000000000000000284000000040101000100000000000000000000000064ffffffff0000008100000000000000040000009f0000000100000000000000280000000100000000000000790000000100000000000001440000000100000000 false Filter.vhd 1 work 0 0 000000ff00000000000000010000000000000000010000000000000000000000000000000000000125000000010001000100000000000000000000000064ffffffff000000810000000000000001000001250000000100000000 false work 1 Configure Target Device Design Utilities Design Utilities/Compile HDL Simulation Libraries Implement Design/Map Implement Design/Place & Route/Back-annotate Pin Locations Implement Design/Place & Route/Generate IBIS Model Implement Design/Place & Route/Generate Post-Place & Route Static Timing Implement Design/Translate User Constraints Synthesize - XST 0 0 000000ff00000000000000010000000100000000000000000000000000000000000000000000000198000000010000000100000000000000000000000064ffffffff000000810000000000000001000001980000000100000000 false Synthesize - XST 000000ff00000000000000020000013f0000012001000000060100000002 Implementation 2 /Filter_tb - behavior |home|epilef|Proyectos|FiltroHDL|FiltroHDL|Filter_tb.vhd Unassigned User Library Modules 0 0 000000ff0000000000000001000000010000000000000000000000000000000002020000000100000001000000640000010d000000020000000000000000000000000200000064ffffffff0000008100000003000000020000010d0000000100000003000000000000000100000003 false Unassigned User Library Modules 1 Design Utilities/Compile HDL Simulation Libraries 0 0 000000ff000000000000000100000001000000000000000000000000000000000000000000000000f1000000010000000100000000000000000000000064ffffffff000000810000000000000001000000f10000000100000000 false 1 0 0 000000ff000000000000000100000001000000000000000000000000000000000000000000000000f1000000010000000100000000000000000000000064ffffffff000000810000000000000001000000f10000000100000000 false 1 User Constraints 0 0 000000ff000000000000000100000001000000000000000000000000000000000000000000000000f1000000010000000100000000000000000000000064ffffffff000000810000000000000001000000f10000000100000000 false