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This commit is contained in:
epilef
2017-03-08 09:27:39 -03:00
parent 26dc3504db
commit 9a850c28e4
10 changed files with 469 additions and 275 deletions
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14
FiltroHDL/.gitignore vendored Normal file
View File

@@ -0,0 +1,14 @@
_xmsgs/*
xst/*
*.cmd_log
*.lso
*.ngc
*.ngr
*.prj
*.stx
*.syr
*.xst
*.xml
*.html
*.xrpt

11
FiltroHDL/Filter.vhd
View File

@@ -1,7 +1,7 @@
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.NUMERIC_STD.ALL;
use work.array_functions.all;
use work.filter_pkg.all;
entity Filter is
generic (
@@ -10,7 +10,7 @@ entity Filter is
SIMETRIC : boolean := TRUE;
CONSTANTS : array_of_integers := (-10,-9,-8,-7,-6,-5,-4,3,-2,-1,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20)
CONSTANTS : array_of_integers := (-7,-6,-5,-4,-3,-2,-1,0,1,2,3,4,5,6,7,8)
);
port (
@@ -19,7 +19,8 @@ entity Filter is
reset: in std_logic;
d_i : in std_logic;
d_o : out std_logic
d_o : out std_logic;
p_o : out std_logic_vector(9 downto 0)
);
end Filter;
@@ -49,6 +50,7 @@ architecture Behavioral of Filter is
signal d_s : std_logic := '0';
signal p_s : std_logic_vector(9 downto 0) := (others => '0');
type STATUS_T is ( wait_start,
clear,
@@ -62,6 +64,7 @@ architecture Behavioral of Filter is
begin
d_o <= d_s;
p_o <= p_s;
--~ Proceso sincrónico para cambio de estados
stateProcess:
@@ -145,6 +148,8 @@ begin
begin
if ( rising_edge(clk_i) ) then
if ( enable = '1' and sample_clk_s = '1' and i = N-1 ) then
p_s <= std_logic_vector(to_signed(accum,p_s'length));
if ( accum > 0 ) then
d_s <= '1';
else

36
FiltroHDL/FilterWrapper.vhd
View File

@@ -2,7 +2,7 @@ library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use work.array_functions.all;
use work.filter_pkg.all;
@@ -10,55 +10,37 @@ entity FilterWrapper is
generic (
CLK_FREQ : integer := 50e6;
DATA_RATE: integer := 250e3;
SIMETRIC : boolean := TRUE
SIMETRIC : boolean := TRUE;
CONSTANTS : array_of_integers := (-4,-3,-2,-1,0,1,2,3,4,5)
);
port (
clk : in std_logic;
ce: in std_logic;
d_i : in std_logic;
d_o : out std_logic
d_o : out std_logic;
p_o : out std_logic_vector(9 downto 0)
);
end FilterWrapper;
architecture Behavioral of FilterWrapper is
component Filter is
generic (
CLK_FREQ : integer := 200e6;
DATA_RATE: integer := 250e3;
SIMETRIC : boolean := TRUE;
CONSTANTS : array_of_integers := (1,2,3,4,5,6,7,8,9,10)
);
port (
clk_i : in std_logic;
enable: in std_logic;
reset: in std_logic;
d_i : in std_logic;
d_o : out std_logic
);
end component;
begin
uut: Filter Generic Map(
CLK_FREQ => CLK_FREQ,
DATA_RATE => DATA_RATE,
SIMETRIC => SIMETRIC,
CONSTANTS => (-19,-18,-17,-16,-15,-14,-13,-12,-11,-10,-9,-8,-7,-6,-5,-4,-3,-2,-1,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20)
CONSTANTS => CONSTANTS
)
PORT MAP (
clk_i => clk,
enable => ce,
reset => '0',
d_i => d_i,
d_o => d_o
d_o => d_o,
p_o => p_o
);

60
FiltroHDL/FiltroHDL.gise
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@@ -22,10 +22,68 @@
<sourceproject xmlns="http://www.xilinx.com/XMLSchema" xil_pn:fileType="FILE_XISE" xil_pn:name="FiltroHDL.xise"/>
<files xmlns="http://www.xilinx.com/XMLSchema">
<file xil_pn:fileType="FILE_CMD_LOG" xil_pn:name="Filter.cmd_log"/>
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_LSO" xil_pn:name="Filter.lso"/>
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_NGC" xil_pn:name="Filter.ngc"/>
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_NGR" xil_pn:name="Filter.ngr"/>
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_XST_PROJECT" xil_pn:name="Filter.prj"/>
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_XST_STX" xil_pn:name="Filter.stx"/>
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_XST_REPORT" xil_pn:name="Filter.syr"/>
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_XST" xil_pn:name="Filter.xst"/>
<file xil_pn:fileType="FILE_NCD" xil_pn:name="FilterWrapper_guide.ncd" xil_pn:origination="imported"/>
<file xil_pn:fileType="FILE_HTML" xil_pn:name="Filter_envsettings.html"/>
<file xil_pn:fileType="FILE_NCD" xil_pn:name="Filter_guide.ncd" xil_pn:origination="imported"/>
<file xil_pn:fileType="FILE_HTML" xil_pn:name="Filter_summary.html"/>
<file xil_pn:fileType="FILE_XRPT" xil_pn:name="Filter_xst.xrpt"/>
<file xil_pn:fileType="FILE_XMSGS" xil_pn:name="_xmsgs/xst.xmsgs"/>
<file xil_pn:fileType="FILE_FITTER_REPORT" xil_pn:name="webtalk_pn.xml"/>
<file xil_pn:fileType="FILE_DIRECTORY" xil_pn:name="xst"/>
</files>
<transforms xmlns="http://www.xilinx.com/XMLSchema"/>
<transforms xmlns="http://www.xilinx.com/XMLSchema">
<transform xil_pn:end_ts="1488973412" xil_pn:name="TRAN_copyInitialToXSTAbstractSynthesis" xil_pn:start_ts="1488973412">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
</transform>
<transform xil_pn:end_ts="1488973412" xil_pn:name="TRAN_schematicsToHdl" xil_pn:prop_ck="4609275351315296327" xil_pn:start_ts="1488973412">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
</transform>
<transform xil_pn:end_ts="1488973412" xil_pn:name="TRAN_regenerateCores" xil_pn:prop_ck="-833239187539256290" xil_pn:start_ts="1488973412">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
</transform>
<transform xil_pn:end_ts="1488973412" xil_pn:name="TRAN_SubProjectAbstractToPreProxy" xil_pn:start_ts="1488973412">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
</transform>
<transform xil_pn:end_ts="1488973412" xil_pn:name="TRAN_xawsTohdl" xil_pn:prop_ck="-1655528565268634295" xil_pn:start_ts="1488973412">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
</transform>
<transform xil_pn:end_ts="1488973412" xil_pn:name="TRAN_SubProjectPreToStructuralProxy" xil_pn:prop_ck="-1970394750299821092" xil_pn:start_ts="1488973412">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
</transform>
<transform xil_pn:end_ts="1488973412" xil_pn:name="TRAN_platgen" xil_pn:prop_ck="-2078934713865234392" xil_pn:start_ts="1488973412">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
</transform>
<transform xil_pn:end_ts="1488981613" xil_pn:in_ck="-6187103106443271507" xil_pn:name="TRANEXT_xstsynthesize_spartan6" xil_pn:prop_ck="-1260750720564158537" xil_pn:start_ts="1488981592">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
<outfile xil_pn:name="Filter.lso"/>
<outfile xil_pn:name="Filter.ngc"/>
<outfile xil_pn:name="Filter.ngr"/>
<outfile xil_pn:name="Filter.prj"/>
<outfile xil_pn:name="Filter.stx"/>
<outfile xil_pn:name="Filter.syr"/>
<outfile xil_pn:name="Filter.xst"/>
<outfile xil_pn:name="Filter_xst.xrpt"/>
<outfile xil_pn:name="_xmsgs/xst.xmsgs"/>
<outfile xil_pn:name="webtalk_pn.xml"/>
<outfile xil_pn:name="xst"/>
</transform>
</transforms>
</generated_project>

2
FiltroHDL/FiltroHDL.xise
View File

@@ -25,7 +25,7 @@
<association xil_pn:name="PostRouteSimulation" xil_pn:seqID="16"/>
<association xil_pn:name="PostTranslateSimulation" xil_pn:seqID="16"/>
</file>
<file xil_pn:name="array_functions.vhd" xil_pn:type="FILE_VHDL">
<file xil_pn:name="filter_pkg.vhd" xil_pn:type="FILE_VHDL">
<association xil_pn:name="BehavioralSimulation" xil_pn:seqID="33"/>
<association xil_pn:name="Implementation" xil_pn:seqID="1"/>
</file>

32
FiltroHDL/array_functions.vhd → FiltroHDL/filter_pkg.vhd
View File

@@ -2,8 +2,8 @@ library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.NUMERIC_STD.ALL;
package array_functions is
constant MAX_RANGE : integer := 255;
package filter_pkg is
constant MAX_RANGE : integer := 511;
type array_of_integers is array(integer range <>) of integer range -MAX_RANGE to MAX_RANGE;
@@ -11,9 +11,33 @@ package array_functions is
return integer;
function reorder_array ( K : in array_of_integers ; simetric : in boolean )
return array_of_integers;
component Filter is
generic (
CLK_FREQ : integer := 200e6;
DATA_RATE: integer := 250e3;
SIMETRIC : boolean := TRUE;
CONSTANTS : array_of_integers := (-4,-3,-2,-1,0,1,2,3,4,5)
);
port (
clk_i : in std_logic;
enable: in std_logic;
reset: in std_logic;
d_i : in std_logic;
d_o : out std_logic;
p_o : out std_logic_vector(9 downto 0)
);
end component;
end package;
package body array_functions is
package body filter_pkg is
function array_sum ( K : in array_of_integers ) return integer is
variable sum : integer := 0;
@@ -51,4 +75,4 @@ package body array_functions is
end if;
end reorder_array;
end array_functions;
end filter_pkg;

20
FiltroHDL/iseconfig/FiltroHDL.projectmgr
View File

@@ -9,13 +9,13 @@
<ClosedNodesVersion>2</ClosedNodesVersion>
</ClosedNodes>
<SelectedItems>
<SelectedItem>Filter - Behavioral (/home/epilef/Proyectos/FiltroHDL/FiltroHDL/Filter.vhd)</SelectedItem>
<SelectedItem>Filter - Behavioral (/home/epilef/4-FiltroHDL/FiltroHDL/Filter.vhd)</SelectedItem>
</SelectedItems>
<ScrollbarPosition orientation="vertical" >0</ScrollbarPosition>
<ScrollbarPosition orientation="horizontal" >0</ScrollbarPosition>
<ViewHeaderState orientation="horizontal" >000000ff00000000000000010000000100000000000000000000000000000000020200000001000000010000006400000100000000020000000000000000000000000200000064ffffffff000000810000000300000002000001000000000100000003000000000000000100000003</ViewHeaderState>
<ViewHeaderState orientation="horizontal" >000000ff00000000000000010000000100000000000000000000000000000000020200000001000000010000006400000110000000020000000000000000000000000200000064ffffffff000000810000000300000002000001100000000100000003000000000000000100000003</ViewHeaderState>
<UserChangedColumnWidths orientation="horizontal" >true</UserChangedColumnWidths>
<CurrentItem>Filter - Behavioral (/home/epilef/Proyectos/FiltroHDL/FiltroHDL/Filter.vhd)</CurrentItem>
<CurrentItem>Filter - Behavioral (/home/epilef/4-FiltroHDL/FiltroHDL/Filter.vhd)</CurrentItem>
</ItemView>
<ItemView engineview="SynthesisOnly" sourcetype="" guiview="Process" >
<ClosedNodes>
@@ -40,7 +40,7 @@
</SelectedItems>
<ScrollbarPosition orientation="vertical" >0</ScrollbarPosition>
<ScrollbarPosition orientation="horizontal" >0</ScrollbarPosition>
<ViewHeaderState orientation="horizontal" >000000ff000000000000000100000000000000000100000000000000000000000000000000000005a4000000040101000100000000000000000000000064ffffffff0000008100000000000000040000009f0000000100000000000000280000000100000000000000790000000100000000000004640000000100000000</ViewHeaderState>
<ViewHeaderState orientation="horizontal" >000000ff00000000000000010000000000000000010000000000000000000000000000000000000284000000040101000100000000000000000000000064ffffffff0000008100000000000000040000009f0000000100000000000000280000000100000000000000790000000100000000000001440000000100000000</ViewHeaderState>
<UserChangedColumnWidths orientation="horizontal" >false</UserChangedColumnWidths>
<CurrentItem>Filter.vhd</CurrentItem>
</ItemView>
@@ -52,7 +52,7 @@
<SelectedItems/>
<ScrollbarPosition orientation="vertical" >0</ScrollbarPosition>
<ScrollbarPosition orientation="horizontal" >0</ScrollbarPosition>
<ViewHeaderState orientation="horizontal" >000000ff00000000000000010000000000000000010000000000000000000000000000000000000117000000010001000100000000000000000000000064ffffffff000000810000000000000001000001170000000100000000</ViewHeaderState>
<ViewHeaderState orientation="horizontal" >000000ff00000000000000010000000000000000010000000000000000000000000000000000000125000000010001000100000000000000000000000064ffffffff000000810000000000000001000001250000000100000000</ViewHeaderState>
<UserChangedColumnWidths orientation="horizontal" >false</UserChangedColumnWidths>
<CurrentItem>work</CurrentItem>
</ItemView>
@@ -70,13 +70,13 @@
<ClosedNode>User Constraints</ClosedNode>
</ClosedNodes>
<SelectedItems>
<SelectedItem></SelectedItem>
<SelectedItem>Synthesize - XST</SelectedItem>
</SelectedItems>
<ScrollbarPosition orientation="vertical" >0</ScrollbarPosition>
<ScrollbarPosition orientation="horizontal" >0</ScrollbarPosition>
<ViewHeaderState orientation="horizontal" >000000ff000000000000000100000001000000000000000000000000000000000000000000000000e1000000010000000100000000000000000000000064ffffffff000000810000000000000001000000e10000000100000000</ViewHeaderState>
<ViewHeaderState orientation="horizontal" >000000ff00000000000000010000000100000000000000000000000000000000000000000000000198000000010000000100000000000000000000000064ffffffff000000810000000000000001000001980000000100000000</ViewHeaderState>
<UserChangedColumnWidths orientation="horizontal" >false</UserChangedColumnWidths>
<CurrentItem></CurrentItem>
<CurrentItem>Synthesize - XST</CurrentItem>
</ItemView>
<SourceProcessView>000000ff00000000000000020000013f0000012001000000060100000002</SourceProcessView>
<CurrentView>Implementation</CurrentView>
@@ -127,12 +127,12 @@
<ClosedNode>User Constraints</ClosedNode>
</ClosedNodes>
<SelectedItems>
<SelectedItem></SelectedItem>
<SelectedItem/>
</SelectedItems>
<ScrollbarPosition orientation="vertical" >0</ScrollbarPosition>
<ScrollbarPosition orientation="horizontal" >0</ScrollbarPosition>
<ViewHeaderState orientation="horizontal" >000000ff000000000000000100000001000000000000000000000000000000000000000000000000f1000000010000000100000000000000000000000064ffffffff000000810000000000000001000000f10000000100000000</ViewHeaderState>
<UserChangedColumnWidths orientation="horizontal" >false</UserChangedColumnWidths>
<CurrentItem></CurrentItem>
<CurrentItem/>
</ItemView>
</Project>

3
FiltroTestM/.gitignore vendored Normal file
View File

@@ -0,0 +1,3 @@
*.htm
*.log
*.autosave

14
FiltroTestM/FilterWrapper_config.m
View File

@@ -21,10 +21,17 @@ function FilterWrapper_config(this_block)
this_block.addSimulinkOutport('d_o');
this_block.addSimulinkOutport('p_o');
d_o_port = this_block.port('d_o');
d_o_port.setType('UFix_1_0');
d_o_port.useHDLVector(false);
p_o_port = this_block.port('p_o');
p_o_port.setType('UFix_10_0');
p_o_port.useHDLVector(true);
% -----------------------------
if (this_block.inputTypesKnown)
% do input type checking, dynamic output type and generic setup in this code block.
@@ -52,9 +59,12 @@ function FilterWrapper_config(this_block)
% on input types, make the settings in the "inputTypesKnown" code block.
% The addGeneric function takes 3 parameters, generic name, type and constant value.
% Supported types are boolean, real, integer and string.
this_block.addGeneric('CLK_FREQ','integer','1000');
this_block.addGeneric('CLK_FREQ','integer','500');
this_block.addGeneric('DATA_RATE','integer','1');
this_block.addGeneric('SIMETRIC','boolean','TRUE');
this_block.addGeneric('CONSTANTS','array_of_integers','(-6, -5, -4, -3, -2, -1, 0, 1, 2, 3, 4, 5, 6, 7)');
% Add addtional source files as needed.
% |-------------
@@ -69,7 +79,7 @@ function FilterWrapper_config(this_block)
% this_block.addFile('');
% this_block.addFile('');
this_block.addFile('../FiltroHDL/array_functions.vhd');
this_block.addFile('../FiltroHDL/filter_pkg.vhd');
this_block.addFile('../FiltroHDL/Filter.vhd');
this_block.addFile('../FiltroHDL/FilterWrapper.vhd');

552
FiltroTestM/TestModel.mdl
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